ASIC/FPGA Design and Verification Out Source Services Following is a very short description of what I did: - free lance verification contractor at PMC Sierra August 2009 till Present: Participate in the SOC verification team using specman as main tool.
- free lance verification contractor at Siverge Networks September 2007 till August 1009: Verification engineer for a very complex and challenging TDM networking ASIC doing mainly SONET.
- free Lance Contractor at Dblur 2007 to 2007 (less than a year):Write and maintain new and existing scripts for verification.
- free lance contractor at PowerDsine 2007 to 2007 (less than a year) Verification for a power control ASIC using system verilog.
- free lance vericiation eng. at FlexLight 2004 to 2005 (1 year) Validate ARM9 (SOC Smart from NEC) + general specman verification.
- free lance contractor at runcom 2004 to 2004 (less than a year) Wrote an environment for testing ARM11 based SOC build from discrete IP cores. The environment allowed for ARM control (simulation stop on fail or pass declaration at the end by the ARM processor itself) with detailed reports on the assorted ARM11 buses and registers. Wrote tests involving VERILOG and ARM assembly to verify ARM11 based SOC.
- free lance contractor at wavion 2003 to 2004 (1 year) spec detailed design /verilog coding/ tested in stand alone+matlab pre - integration / synthesis as well in the official environment. The tasks included three mega - blocks namely: TX & RX single carrier and RX control.
- free Lance Contractor at Emblaze 2003 to 2003 (less than a year) Designed and verified complex AHB master targeting as a DMA between assorted image processing units using the fast ARM bus.
- free Lance Contractor at optix 2000 to 2003 (3 years) Participating in verification, using specman, of an ASIC of OC-192 Sonet Optical Network.
- ASIC/FPGA technical leader at Nortel 1998 to 2000 (2 years)Lead team of 5 engineers to design / validate complex FPGA designs that we later converted to ASIC.
- digital design engineer at 3Com 1990 to 1998 (8 years) Designer of digital, transputer based, card that included framer and a SMDS device. Designed from a initial concept until high volume production for a 12 port (10BASET) Ethernet with ATM port device: FPGA, PCB and peripherals including i960CA- 25. Porting of a PC software driver, to run on an i960RP, of an Ethernet PC Card. Act as consultant engineer, participating in an ATM switch project. Responsible for resolving any technical issue in ATM chip- set.
- practical engineer at Israel Defense Forces 1984 to 1991 (7 years) Participating in developing and maintaining a large digital system of special purpose hardware including working at TRW in Santa Clara, CA (1985-1988) on this high tech project.
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